1. Field of the Invention
The present invention relates generally to electronic circuits and, more particularly, to a semiconductor integrated circuit device including a logarithmic transformation circuit that attains a logarithmic transformation function.
2. Description of the Related Art
Generally, a logarithmic transformation circuit is the electronic circuit which transforms or converts an input signal supplied thereto into an output voltage having a logarithmic relationship therewith, by utilizing the fact that the voltage between the base and emitter electrodes (base-to-emitter voltage) of a bipolar transistor used therein and a collector current are inherently in the logarithmic relation. Such a logarithmic transformation circuit has a wide applicability as a gain-changeable circuit, by being combined with an inverse logarithmic transformation circuit being added to the output stage of it.
A presently available logarithmic transformation circuit suffers from undesirable occurrence of distortion during the logarithmic transformation of an input signal. The distortion takes place due to the fact that the base-to-emitter voltage of bipolar transistors employed in the circuit may vary with a change in the operating conditions (i.e., variation in collector current) of the bipolar transistors. Such a variation in the base-to-emitter voltage may be rephrased as a variation in the conductance of the input-stage bipolar transistors themselves. Conventionally, to make the influence of the base-to-emitter voltage variation small or "invisible" as much as possible, an increased current is forced to flow in the input-stage bipolar transistors. The forcible supplement of such increased current leads to an increase in the power consumption of a semiconductor integrated circuit device including therein the logarithmic transformation circuit. This may raise serious disadvantages, especially in the case wherein the logarithmic transformation circuit is packed into a highly integrated solid-state circuit device being operative at a lower power supply voltage.
Gain-cell circuits employing logarithmic transformation circuits are known, a typical one of which is described, for example, in Published Unexamined Japanese Patent Application No. 61-224715. A gain-cell circuit described therein is used as the main constituent of an active filter circuit. The gain-cell circuit includes in its input stage a logarithmic transformation circuit. An inverse logarithmic transformation circuit is arranged in the output stage of the gain-cell circuit. The logarithmic transformation circuit and the inverse logarithmic transformation circuit are connected between a power supply voltage line and a ground potential line.
The logarithmic transformation circuit essentially consists of a parallel circuit of two pairs of series-connected semiconductor bipolar transistors, resistive elements connected to an intermediate common connection node of each transistor pair, and a constant current source unit associated therewith. The resistive elements are called the "degeneration resistors." The output-stage inverse logarithmic transformation circuit includes a pair of bipolar transistors and another constant current source unit connected therewith.
In the logarithmic transformation circuit, the bipolar transistors on the power-supply voltage side of the above transistor pairs have the base electrodes which serve as input terminals for positive and negative input voltage signals +vin, -vin. The remaining transistors of the transistor pairs reside on the ground potential side, and each of them is diode-connected. The collector current Ic of each diode-connected transistor and the voltage between the base and emitter electrodes (base-to-emitter voltage) vbe satisfies a specific relation defined as follows: vbe=.alpha..ln(Ic), where "ln" is the mathematical symbol representing a natural logarithm. Accordingly, a specific voltage is output by the input-stage transistors on the power supply voltage side in the transistor pairs, the specific voltage being developed as a result of each of the collector currents being logarithmically converted into the base-to-emitter voltage vbe of a corresponding diode-connected transistor. The output voltage is supplied to the base electrodes of the bipolar transistors constituting the inverse logarithmic transformation circuit. As a result, a signal equivalent to a linear-converted input voltage signal vin (i.e., the difference between input voltages +vin, -vin) of the input-stage logarithmic transformation circuit appears at the collector electrodes of these bipolar transistors constituting the inverse logarithmic transformation circuit.
As is known among those skilled in the art, the electric equivalent circuitry of a "half circuit" of the logarithmic transformation circuit may typically be represented by a series circuit of the "degeneration" resistors coupled between the input voltage +vin and the ground potential GND, and a conductance component gm coupled between an intermediate common connection node of the resistors and the ground. The transconductance Gm of this half circuit may be defined by: ##EQU1## where "re" is the resistance of the resistors.
The above equation indicates that it is necessary to maintain a variation of the value "2/gm" negligibly as much as possible with respect to the resistance "re" in order to enable the logarithmic transformation circuit to operate in an expanded dynamic range of voltage amplitude of the input signal +vin to expand the linear operation range as desired. Otherwise, an undesirable variation will occur in the base-to-emitter voltage vbe of the bipolar transistor, which results in a distortion being generated. The value "2/gm" is determined depending on variation in the operating current of corresponding two transistors. With a conventional circuit design scheme, decreasing the value "2/gm" is attained by forcing an increased current to flow in these transistors. The supplement of the large current to the transistors, however, comes with one disadvantage: Obviously, supplying large current leads to an increase in the total power consumption of the logarithmic transformation circuit.